TSMC, the leading wafer foundry, will hold its investor conference on the 16th, with its advanced packaging layout becoming a key focus of attention. Market observers assess that TSMC plans to convert its existing 8-inch wafer fabs in Taiwan into advanced packaging facilities. Its current backend testing plants will support the 2-nanometer advanced process, while Chiayi and Tainan are set to become new major hubs for advanced packaging and testing. In addition, TSMC is also expanding its advanced packaging capacity in the United States.
In its annual report, TSMC stated that it continues to develop advanced packaging and 3D chip stacking technologies, including CoWoS, Integrated Fan-Out (InFO), 3D System-on-Integrated-Chip (TSMC-SoIC), and Silicon Photonics.
At its investor conference in mid-January, TSMC estimated that its capital expenditure this year would range between US$52 billion and US$56 billion, with approximately 70% to 80% allocated to advanced process technologies, 10% to specialty process technologies, and 10% to 20% for advanced packaging, testing, photomask production, and other projects.