In this article, I will give an overview of co-packaged optics (CPO), focusing mainly on scale-up, since this is the consensus bottleneck for handling the bandwidth of massively parallel AI compute.
This article ties together CPO device physics, manufacturing processes, and circuit design to build a comprehensive framework of technology choices and trade-offs for all engineers involved. The findings here come from my experience attending the ISSCC optical short courses/forums, DesignCon, ECTC, and other conferences, as well as insights from experts in the field.
The article mainly explores the technical options a system architect would consider for mid-reach O-band 224Gbps PAM4 CPO connecting trays within a rack, and provides the necessary background. This architecture, along with the various VCSEL-based short-reach optical variants, is suited to moving the massive volumes of data in massively parallel GPU systems across the typical length ranges of trays and racks.
One important distinction to keep in mind is that some materials are specialized for generating light, and others for manipulating light. I find that the technologies in these two areas are often confused (InP is suitable for both!).
This article is for educational purposes only and is aimed at a broad audience. The options discussed are not set in stone; they are the most common commercial implementations as I currently see them, and are not meant to recommend any particular vendor or topology. Besides the options I introduce, there are many other excellent alternatives. As always, if you are an expert and spot an error, please contact me so I can correct it promptly.
