Last month, Micron Technology() unveiled its DRAM and NAND flash roadmap for the next several years. It disclosed plans to adopt wafer bonding, new materials to shrink NAND cells, and high-NA EUV lithography, and it detailed its progress toward 3D DRAM.
Perhaps the most notable part of the plan is that Micron intends to expand its custom DRAM and NAND portfolio. AI developers increasingly want memory and storage optimized for their unique processor architectures and specific workloads.
“DRAM is now approaching atomic-level limits. While we’re confident in the next few planar nodes, we’re very focused on making sure we introduce 3D DRAM at the optimal time for cost and performance,” said Scott DeBoer, Micron’s president and chief technology and product officer, at a company event earlier this month. “For 3D NAND, we’re really focused on using new materials to increase cell density and continuing future XYZ scaling.”